Detailed description

• This is a new feature.
• The existing problem is unreadable memory (RAM, flash, bus registers) on some 32-bit RISC-V microcontrollers, with SBA unimplemented and AAM unsupported.
• The PR solves it by providing methods of reading and writing single elements 8/16/32-bit wide via progbuf postexec of AAR per RISC-V Debug Spec v0.13; no CSR access is needed.

Tested on BMDA and blackpill-f411ce against GD32VF103.
Initial version used DATA0 DM MMR access from progbuf, second version is GPR-only. This is 2x slower than AAM on GD32VF103 (which is implements), but Hart has 4 data registers and 2 progbuf registers so I intend to also implement the auto-incrementing snippets mentioned in Spec using abstractauto[0] (retrigger on DM DATA0 reads/writes).

Your checklist for this pull request

• I've read the Code of Conduct
• I've read the guidelines for contributing to this repository
• It builds for hardware native (see Building the firmware)
• It builds as BMDA (see Building the BMDA)
• I've tested it to the best of my ability
• My commit messages provide a useful short description of what the commits do

Closing issues